Iei-integration WAFER-LX v1.22 Manual do Utilizador Página 54
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WAFER-LX Motherboard
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4.2.5 Battery Connector
CN Label: CN7
CN Type:
2-pin header (1x2)
CN Location:
See
Figure 4-7
CN Pinouts:
See
Table 4-8
The battery connector is connected to a backup battery. The battery connector is also
used to reset the CMOS memory if the incorrect BIOS settings have been made and the
system cannot boot up.
Figure 4-7: Battery Connector Location
PIN NO. DESCRIPTION
1 Battery+
2 Ground
Table 4-8: Battery Connector Pinouts
- WAFER-LX 1
- Revision 2
- Copyright 3
- Packing List 4
- Table of Contents 5
- List of Figures 11
- List of Tables 15
- BIOS Menus 17
- 1 Introduction 19
- 1.1 Overview 20
- 2 Detailed Specifications 27
- 2.1 Overview 28
- 2.2 Dimensions 28
- Page 11 29
- 2.3 Data Flow 30
- 2.4 AMD Geode™ LX 800 CPU 31
- Page 14 32
- 2.6 Graphics Support 33
- 2.7 Memory Support 34
- 2.10 Drive Interfaces 36
- 2.11 Serial Ports 37
- 2.12 Real Time Clock 37
- 2.13 System Monitoring 37
- 2.14 USB Interfaces 37
- 2.15 BIOS 37
- Page 20 38
- 2.18 Power Consumption 39
- 3 Unpacking 41
- 3.1 Anti-static Precautions 42
- 3.2 Unpacking 42
- 3.3 Unpacking Checklist 43
- Page 26 44
- 4 Connectors and Jumpers 45
- Page 29 47
- Page 30 48
- NOTE: 49
- PIN NO. DESCRIPTION 50
- 1 +12 V 50
- 3 PS_ON 52
- 1 PWRBTN# 52
- Page 35 53
- 1 Battery+ 54
- 2 Ground 54
- Page 38 56
- 4.2.7 Fan Connector 56
- 1 CPUFAN_OUT 57
- 2 +12 V 57
- Page 40 58
- 1 GND 2 5 V 59
- 3 GPO0 4 GPO1 59
- 5 GPO2 6 GPO3 59
- 7 GPI0 8 GPI1 59
- 9 GPI2 10 GPI3 59
- Page 43 61
- 1 ADJ (Def: GND) 62
- 5 BL_EN 62
- 3 -12 V 66
- Page 49 67
- Page 50 68
- 1 Reset+ 69
- Page 54 72
- Page 56 74
- 1 VCC_USB 2 GND 75
- 3 DATA3- 4 DATA4+ 75
- 5 DATA3+ 6 DATA4 75
- 7 GND 8 VCC_USB 75
- 1 VCC_USB 5 VCC_USB 76
- 2 DATA1- 6 DATA2 76
- 3 DATA1+ 7 DATA2+ 76
- 4 GND 8 GND 76
- 1 TX+ 2 TX 77
- 3 RX+ 4 NC 77
- 5 NC 6 RX 77
- 7 NC 8 NC 77
- 1 RED 6 GROUND 11 NC 78
- 2 GREEN 7 GROUND 12 DDCDAT 78
- 3 BLUE 8 GROUND 13 HSYNC 78
- 4 NC 9 NC 14 VSYNC 78
- Page 61 79
- 5 Installation and 80
- Configuration 80
- 5.1 Anti-static Precautions 81
- 5.3 Unpacking 82
- WARNING! 83
- Page 70 88
- 2-3 IDE Master 91
- TFT LCD Type Description 91
- 1-2 FPCLK Default 91
- 2-3 #FPCLK 91
- 5.6 Chassis Installation 92
- 5.7 Rear Panel Connectors 92
- 6 BIOS Setup 94
- 6.1 Introduction 95
- Page 80 98
- 6.2 Standard CMOS Features 99
- WAFER-LX Motherboard 100
- Page 82 100
- 6.3 Advanced BIOS Features 103
- NTER and 108
- Page 93 111
- Page 94 112
- Page 97 115
- Page 98 116
- 6.5 Integrated Peripherals 117
- Page 102 120
- Page 107 125
- Page 108 126
- 6.6 Power Management Setup 127
- 6.7 PnP/PCI Configurations 129
- Page 114 132
- Page 115 133
- 6.8 PC Health Status 135
- Page 118 136
- 7 RAID Setup 137
- 7.1 VIA® RAID Utility 138
- 7.3 Creating a RAID Array 139
- Page 122 140
- 7.3.1 Automatic Setup 140
- Page 123 141
- Page 124 142
- 7.3.2 Manual Setup 142
- Page 125 143
- Page 126 144
- Page 127 145
- 7.4 Delete a RAID Array 146
- Page 129 147
- 7.5 Selecting a Boot Array 148
- Page 131 149
- Page 132 150
- 7.7 Exiting The RAID Utility 151
- 8 Software Drivers 152
- Page 136 154
- 8.2 Device Driver Menu 155
- Page 138 156
- Page 139 157
- 8.3 VGA Driver 158
- Page 141 159
- Page 142 160
- Page 143 161
- Page 144 162
- Page 145 163
- Page 146 164
- Page 147 165
- 8.4 Audio Driver 166
- Page 149 167
- Page 150 168
- Page 151 169
- Page 152 170
- Page 153 171
- Page 154 172
- Page 155 173
- Page 156 174
- 8.5 LAN Driver 175
- Page 158 176
- Page 159 177
- Page 160 178
- Page 161 179
- Page 162 180
- 8.6 SATA/RAID Driver 181
- Page 164 182
- Page 165 183
- Page 166 184
- Page 167 185
- 8.7 ISA Driver 186
- Page 169 187
- Page 170 188
- Page 171 189
- Page 172 190
- Page 173 191
- Page 174 192
- Page 175 193
- A BIOS Options 194
- B Terminology 198
- Page 181 199
- Page 182 200
- Page 183 201
- C Digital I/O Interface 202
- C.1 Introduction 203
- C.2 DIO Connector Pinouts 203
- D Watchdog Timer 205
- Page 188 206
- E Address Mapping 208
- E.1 IO Address Map 209
- Extend BIOS 210
- E.4 DMA Channel Assignments 211
- F Compatibility 212
- F.2 Compatible Processors 213
- Page 196 214
- G Hazardous Materials 215
- Disclosure 215
- Mercury 216
- Page 199 217
- Page 200 218
- H RAID Levels 219
- H.1 RAID 0 221
- H.2 RAID 1 222
- H.3 JBOD 223
- Page 206 224
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